1 meets pulse waveform template of ccitt i.430 when recommended transformer and chip pair are used excellent longitudinal balance 2kvrms isolation voltage available in tape and reel, tray or tube packaging recognized by ul sc-1 mechanical schematic usa 858 674 8100 germany 49 7032 7806 0 singapore 65 6287 8998 shanghai 86 21 62787060 china 86 755 33966678 taiwan 886 3 4356768 electrical specifcations @ 25c - operating temperature 0c to +70c part number ratio ( 2%) ocl pri (mh min) l sec ( h max) cw/w ( pf max) cd pri ( pf max) dcr pri ( ? 25%) dcr sec ( ? 25%) i dc (ma max) package / schematic a b a & b a b a & b a b a b a b pe-65793 1:1 1:1 22 5 5 100 42 42 2.4 2.4 2.4 2.4 1 sc-1 pe-65795 1:2 1:2 22 15 15 100 80 80 4.3 4.3 4.3 4.3 1 sc-1 dimensions: unless otherwise specifed, all tolerances are inches mm .010 0,25 c ? l surface mount, dual, 2000 vrms 8 9 16 pe-6579x date code country of origin .530 max 13,46 .720 max 18,29 .600 15,24 16x .030 0,76 .120 typ 3,05 .050 typ 1,27 .520 13,21 .760 19,30 .100 typ 2,54 .700 17,78 .004/0,10 16 surf aces .010/.020 0,25/0,51 .122 3,10 .950 max 24,13 .100 2,54 .390 max 9,91 .040/.050 1,02/1,27 suggested pad layout 16 13 14 23 15 14 12 9 58 67 11 10 pri coil a coil b sec t604.f (05/12) pulseelectronics.com isdn s-interface transformers
2 meets pulse waveform template of ccitt i.430 when recommended transformer and chip pair are used excellent longitudinal balance 2kvrms isolation voltage recognized by ul is-1 id-1 mechanical mechanical schematic schematic electrical specifcations @ 25c - operating temperature 0c to +70c part number ratio ( 2%) ocl pri (mh min) l sec ( h max) cw/w ( pf max) cd pri ( pf max) dcr pri ( ? 25%) dcr sec ( ? 25%) isolation (v rms min) i dc (ma max) package / schematic pe-64995nl 1ct:2ct 22 15 100 80 2.5 4.3 2000 1 sc-1 c c a a ? 2kv isolation, through hole, single transformers electrical specifcations @ 25c - operating temperature -40c to +125c part number turns ratio dcr (m max) package / schematic equivalent single primary pins secondary pins equivalent single primary pins secondary pins pe-65495nl 1:2 1-4 1-4 16-13 1:2 pe-64995nl 5-8 12-9 id-1 ratio ratio l through hole, single & dual, 2000 vrms .558 max 14,20 1 2 3 6 4 pe-6499x date code .120 ? .020 3,10 0,30 .400 10,20 .400 10,20 c l c l leads are 22 awg solderable 5 .558 max 14,20 .400 max 10,20 6 4 1 3 2 5 pri : sec pri sec 16 13 14 23 15 14 12 9 58 67 11 10 coil a coil b t604.f (05/12) pulseelectronics.com isdn s-interface transformers
3 transformer selection & packaging ic manufacturer ic part number dual surface mount single through hole, 2 kv rms dual through hole tx & rx tx rx tx & rx at&t/lucent t7903 pe-65795 pe-64995nl pe-64995nl pe-65495 mietec mtc-2072 pe-65795 pe-64995nl pe-64995nl pe-65495 mitel mt8930 pe-65795 pe-64995nl pe-64995nl pe-65495 mc145474/145475 mc145574 national tp3420/34221 pe-65795 pe-64995nl pe-64995nl pe-65495 sgs thomson st5420, st5421 pe-65795 pe-64995nl pe-64995nl pe-65495 peb 2080/2081/2085 siemens psb 2186 pe-65795 pe-64995nl pe-64995nl pe-65495 peb 2084/2086 yamaha 7405b pe-65795 pe-64995nl pe-64995nl pe-65495 notes: a. in this catalog, turns ratio is expressed as primary:secondary. the term ct designates a center tapped winding. a center tapped winding can be created by connecting two ends of a split center winding together on the printed circuit board. in isdn-s applications, the primary winding is the line side transformer winding. b. the minimum primary inductance and the maximum distributed capacitance satisfy the transmistter output and receiver input impedance requirements of ccitti i.430 for both the te and the nt. the maximum distributed capacitance allows sufcient margin for the capacitance of the ic and a protection diode network. it is consistent with the overall maximum value specifed and the permitted length of the basic access te cord. c. the maximum specifed unbalanced dc current capability is based on 20 mh minimum primary ocl d. national recommends a 1:2 receive transformer, but used as a 1:1 ratio by connectin only half the secondary winding. see nationals application note. e. pe-65950 and pe-65853 are recommended for use with siemens peb 2080/2085 and help in meeting the required longitudinal balance. f. standard packaging for all chokes and transformers listed in this catalog is anti-static tubes. optional anti-static tray packaging can be ordered for the surface mount sc-1 and la-1 packages by adding an r sufx to the part number, (ie: pe-65795r). optional tape and reel packaging can be ordered for all surface mount packages by adding a t sufx to the part number, (ie: pe-65795 t). g. for pe-65854, ocl at -40c is 27 h minimum. for maximum performance, using windings (1-8) and (2-7) as a pair and windings (3-6) and (4-5) as a pair. h. for transformers and choke modules, refer to data sheet t632. pe-65795 - - pe-65495 packaging information package type part weight part s/tube part s/tray parts/reel reel diameter tape width pitch la-1 smt 2.0 grams 30 60 250 13 inches 24 mm 24 mm sc-1 smt 7 .0 grams 20 50 150 13 inches 44 mm 2 4 mm id-1 tht 7 .0 grams 20 - - - - - is-1 tht 4 .0 grams 35 - - - - - f d motorola t604.f (05/12) pulseelectronics.com isdn s-interface transformers
4 surface mount, dual, 2000vrms 1. general information - the s-interface is the standardized four-wire digital telephone access point defned by the ccitti i-series recommendations for the integrated services digital network. this basic rate access accommodates two 64kpbs b-channels for information, one 16kbps d-channel intended for signaling and control, and 48 kbps for framing and other purposes, giving a total rate of 192kbps. the ccitt physical layer recommends that the user network interface be transformer coupled. a typical application circuit is presented in figure 1. the transformer provides isolation for the line card or the terminal from the line. it is also a way to provide phantom power feeding to the terminal over the s-loop. each end requires a transmit and a receive transformer. chokes are used in some applications to reduce common mode noise (see note 5). the transformers described in this data sheet are matched to the transceivers ofered by the major ic manufacturers listed. the use of a transformer-chip pair assures that all requirements of ccitt i.430 are met with respect to pulse waveform templates, impedance and longitudinal balance. in addition, the transformers provide the isolation voltages required by the regulatory agencies and are capable of passing surge voltage tests. 2. longitudinal balance for transformers - the longitudinal conversion loss specifcation in i.430 includes a test setup that is intended for system evaluation, whether te or nt. such a test is performed with dc current present. the transformer plays an essential role in achieving the required balance. however, all other elements in the circuit should be also designed to provide the highest possible symmetry. these elements include the protection circuitry, series resistors, chip transmitter output and receiver input, as well as the cables used and the te cord where applicable. a high level of transformer balance compensates for some circuit ac- unbalance, and assures compliances of the system with i.430 on longitudinal conversion loss (lcl) and signal balance. this is accomplished by a well ac-balanced winding confguration whereby the capacitive coupling between primary and secondary windings is evenly distributed. also, both halves of the lineside winding are well balanced. the transformers meet the following lcl specifcations: ? 10khz to 300khz: 60db minimum ? 300khz to 1mhz: minimum value decreasing 20db/decade. (continued on next page) ic xmit sec : pri rcv high freq choke ic rc v xmit low freq choke low freq choke high freq choke s-interfa ce local power dc supply pri : sec nt te sec : pri pri : sec figure 1. typical isdn s-interface application circuit t604.f (05/12) pulseelectronics.com isdn s-interface transformers
5 2. (continued from previous page) a recommended test set up is shown in figure 2. a high inductance low frequency is common mode choke, such as pe- 65950nl or pe-65853nl, is recommended to improve balance, or to correct inherent unbalances of some circuits. 3. impedance requirements - the requirements for minimum impedance in the inactive and powered- down states are expressed by impedance templates for both transmitter and receiver in nt and te. at the low frequency end of 1mhz, it is reasonable to assume that the impedance seen from the line is entirely capacitive. the maximum capacitance budget, derived from the templates, is somewat diferent for the nt and the te. contributors to the total capacitance are: the chip output, the protection circuit, the transformer, common mode choke, and any other element that may be present. in the te case, there is also the maximum allowable te cord impedance. here the maximum buget is 800pf. as a rule, the capacitances should be kept as low as possible in the interface circuit design. with the specifed transformer capacitances, it is possible to remain within budget and have a reasonable margin for measurement errors. 4. common mode chokes - the high frequency 4-wire common mode chokes shown on pages 7 and 8 provide an efective means of compliance with national and international regulations on emi. they are designed to be used in conjunction with either pulses isdn s-interface or t1/cept transformers as shown in figure 1. a high inductance low frequency common mode choke is recommended to improve balance, or to correct inherent unbalances of some isdn s-interface circuits. 5. surge voltage capability for transformers and chokes ? longitudinal voltage peak: 2,400v 10/700 sec ? metallic voltage peak: 800v 10/560 sec 6. behavior under fault conditions - telephony voltages may accidentally appear on the isdn s-interface line to the transformer. the transformer will withstand a dc current of 0.5 amps for 15 minues without permanent damage. such current may be cauased by the telephone central battery. the transformer will also survive ringing voltages. these are nominally 120v or 200v maximum at 20 to 60hz, limited by 1500w resistive or 400 to 600w inductive limiting. these may cause peak currents. 7. flammability - materials used in the products are recognized ul94-vo. products meet the requirements of iec 695-2-2 (needle flame test). surface mount, dual, 2000vrms out hp-8751a network analyzer rb a vt el ism-1 pri sec te rminating resistor ism-1 = wa ndel and goltermann signal balance ratio bridge figure 2. longitudinal balance test circuit t604.f (05/12) pulseelectronics.com isdn s-interface transformers
6 designed for 4-wire links, isdn-s/t and t1/e1/cept high frequency chokes for emi reduction low frequency chokes improve longitudinal balance in isdn-s/t links surface mount and through hole models available electrical specifcations @ 25c - operating temperature 0c to +70c part number ocl pri (mh min) l sec ( h max) cw/w ( pf max) dcr ( w max) isolation (v rms min) package / schematic pe-65853nl 4.7 mh 30% 1 60 1.20 500 pa-2/5c (surface mount) pe-65950nl 4.7 mh 30% 1 50 1.00 500 is-4/1c (through hole) pe-65554nl 24.0 h min .20 15 0.30 500 in-1/c (through hole) pe-65854nl 47.0 h min .18 20 0.40 50 sh-4/c (surface mount) pe-65857nl 22.5 h min .23 17 0.30 500 la-1/c (surface mount) e e f l low frequency high frequency common mode chokes for telecom applications 0 -5 -10 -15 -20 -25 -30 attenuation (db) 1 mhz 10 mhz 100 mhz frequency pe-65854 pe-65554/65857 3.0k 2.8k 2.6k 2.4k 2.2k 2.0k 1.8k 1.6k 1.4k 1.2k 1k 800 600 400 200 0 impedance ( ) 1 mhz 10 mhz 100 mhz frequency pe-65554/65857 pe-65854 typical common mode attenuation for high frequency common mode chokes based on a 100 system. typical impedance for high frequency common mode chokes based on a 100 system. 20k 18k 16k 14k 12k 10k 8k 6k 4k 2k 0 impedance ( ) 100 khz1 mhz 10 mhz frequency pe-65950/65853 pe-65541 typical common mode attenuation for low frequency common mode chokes based on a 100 system. typical impedance for low frequency common mode chokes based on a 100 system. t604.f (05/12) pulseelectronics.com isdn s-interface transformers
7 for more information pulse worldwide headquarters 12220 world trade drive san diego, ca 92128 u.s.a. tel: 858 674 8100 fax: 858 674 8262 pulse europe einsteinstrasse 1 d-71083 herren - berg germany tel: 49 7032 78060 fax: 49 7032 7806 135 pulse china headquarters b402, shenzhen academy of aerospace technol - ogy bldg. 10th kejinan road high-tech zone nanshan district shenzen, pr china 518057 tel: 86 755 33966678 fax: 86 755 33966700 pulse north china room 2704/2705 super ocean finance ctr. 2067 yan an road west shanghai 200336 china tel: 86 21 62787060 fax: 86 2162786973 pulse south asia 135 joo seng road #03-02 pm industrial bldg. singapore 368363 tel: 65 6287 8998 fax: 65 6287 8998 pulse north asia 3f, no. 198 zhongyuan road zhongli city taoyuan county 320 taiwan r. o. c. tel: 886 3 4356768 fax: 886 3 4356823 (pulse) fax: 886 3 4356820 (fre) performance warranty of products ofered on this data sheet is limited to the parameters specifed. data is subject to change without notice. other brand and product names mentioned herein may be trademarks or registered trademarks of their respective owners. ? copyright, 2012. pulse electronics, inc. all rights reserved. in-1 in-4 in-1 sh-4 pa-2 mechanicals schematics 8765 1234 pe-xxxxx date code country of origin .595 max 15,1 1 .480 max 12,20 .130 ? .010 3,30 ? 0,25 .300 7,62 .100 2,54 c l c l .300 7,62 max 1 8 2 7 3 6 4 5 c 1 2 3 4 5 6 7 8 1c 1. dimensions: unless otherwise specifed, all tolerances are 2. see page 3 for packaging information. inches mm .010 0,25 pulseelectronics.com isdn s-interface transformers common mode chokes for telecom applications t604.f (05/12)
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